1. Field of the Invention
The present invention relates to MOS (metal-oxide-semiconductor) thin film transistor (called a "TFT" in this specification).
2. Description of Related Art
TFTs, which can be formed on an insulating film or layer, are now widely used as a load element for a high speed SRAM (static random access memory) or as an active matrix driving element in a color LCD (liquid crystal display).
One typical example of conventional TFTs is shown in JP-B2-91-34699 (Japanese Post-examination Patent Publication No. Hei 3-34699). The shown conventional TFT is formed as follows: First, a polysilicon layer is deposited on an underlying insulating layer, and a gate oxide film and a gate electrode are formed on the polysilicon layer in the named order. By using the stacked layer of the gate electrode and the gate oxide film as a mask, impurity is doped into the polysilicon layer so that a channel region is formed under the stacked layer of the gate electrode and the gate oxide film and a pair of source/drain regions are formed at opposite sides of the channel region. Then, a surface protection layer of an oxide silicon is deposited to cover the gate electrode and the source/drain regions, and a contact hole is formed on a surface protection layer portion above each of the source/drain regions. A source/drain electrode of aluminum is formed in each contact hole. Thus, a TFT device is completed.
In the above mentioned TFT, the channel formed of the polysilicon layer is maintained at a floating potential, differently from a MOS field effect transistor formed on a silicon substrate. Because of this, an electric field is concentrated in a drain end, and carriers generated by an impact ionization are accumulated in the polysilicon layer, so that a source-channel region is biased in a forward direction. As a result, a source-drain breakdown voltage greatly lowers. In order to prevent this drop of the source-drain breakdown voltage, there has been adopted an offset structure in which a pair of source/drain electrodes are formed separately from the gate electrode by some distance "L".
However, in a process for manufacturing the TFT having the above mentioned offset structure, an alignment error of the source/drain in relation to the gate electrode is inevitable, and therefore, dispersion of characteristics is large.
In addition, when the TFT is used as the LCD driving element, a TFT having a breakdown voltage not less than 10 V becomes necessary. In a conventional N-channel TFT, however, a sufficient source-drain breakdown voltage could not have been obtained only with the offset structure.